Tag: 3D-TSV
![Samsung unveils 12-layer 3D-TSV chip packaging technology Samsung unveils 12-layer 3D-TSV chip packaging technology](https://www.electronics-lab.com/wp-content/uploads/2019/10/samsung-bonding-1024x617.jpg)
Technology
Samsung unveils 12-layer 3D-TSV chip packaging technology
An industry’s first, the 12-layer 3D-TSV (Through Silicon Via) technology developed by Samsung Electronics enables the stacking of 12 DRAM chips using more than 60,000 TSV holes, while maintaining the same thickness as current 8-layer chips. By Julien Happich @...
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